High aspect ratio contacts

ABSTRACT

A contact formed in accordance with a process for etching a insulating material to produce an opening having an aspect ratio of at least 15:1 by first exposing the insulating material to a second plasma of a second gaseous etchant comprising Ar, Xe, and combinations thereof to form an opening having an aspect ratio of less than 15:1. Secondly, the insulating material is exposed to a first plasma of a first gaseous etchant having at least fifty percent helium (He) to etch the opening having an aspect ratio of at least 15:1, thereby increasing the aspect ratio to greater than 15:1, 
     where the first gaseous etchant has a lower molecular weight than the second gaseous etchant.

PRIORITY INFORMATION

This application is a Continuation of U.S. patent application Ser. No.12/569,561, filed Sep. 29, 2009, and issued as U.S. Pat. No. 8,093,725on Jan. 10, 2012, which is a Continuation of U.S. patent applicationSer. No. 11/358,659, filed Feb. 21, 2006 and issued as U.S. Pat. No.7,608,195 on Oct. 27, 2009, the specification of which is incorporatedby reference herein.

TECHNICAL FIELD

The invention relates to semiconductors and semiconductor fabricationmethods. More particularly, the invention relates to high aspect ratioopenings in insulating layers and plasma etching methods for formationof high aspect ratio openings.

BACKGROUND OF THE INVENTION

During the formation of semiconductor devices, such as dynamic randomaccess memories (DRAMs), insulating layers are used to electricallyseparate conductive layers. It is often required that the conductivelayers be interconnected through openings in the insulating layer. Suchopenings are commonly referred to as contact holes (i.e., an openingextending through an insulating layer to an active device area) or vias(i.e., an opening extending through an insulating layer between twoconductive layers).

The profile of an opening is of particular importance such that itexhibits specific characteristics when the contact hole or via isprovided or filled with a conductive material. As minimum featuredimensions of devices decrease, the aspect ratio (the ratio of depth towidth) of the openings needs to increase. As the aspect ratio increases,however, a phenomenon termed “twisting” can occur. Twisting occurs whenthe etch front of the opening starts deviating from what isperpendicular to the semiconductor substrate surface, for example,openings in the shape of a corkscrew are possible. The twistingphenomenon with respect to high aspect ratio (HAR) openings isproblematic in that twisting reduces the efficiency of a contact byincreasing the distance between active device areas and by increasingthe difficulty of filling a contact with a conductive material. As such,a suitable solution to the twisting phenomenon in HAR etch processes isdesired.

SUMMARY OF THE INVENTION

Embodiments of the present disclosure include a process for etching aninsulating layer with a first gaseous etchant having a flow rate (squarecubic centimeters per minute (sccm)) at least fifty (50) percent helium(He). According to the present disclosure, twisting phenomenon in highaspect ratio contacts (HARCs) can be reduced through the use of thefirst gaseous etchant as described in the present disclosure. In otherembodiments, the first gaseous etchant used to etch HARCs is a mixtureof Ar and He. In one embodiment, the first gaseous etchant can be amixture of about ninety (90) percent He and about ten (10) percent Ar.In yet another embodiment, the first gaseous etchant is He.

As used herein, the term “high aspect ratio contact” (HARC) includescontacts, openings, vias, and/or trenches in an insulating layer havingan aspect ratio (the ratio of depth to width) of at least 15:1 for adepth dimension of about 80 nm. As used herein, the term “insulatinglayer” includes those materials used to separate conductive layers.Examples of insulating layers include silicon dioxide, phosphorous dopedsilicon dioxide, or a dielectric such as silicate glass, silicon oxide,silane, tetraethyl orthosilicate (TEOS), polytetraflouroethylene (PTFE),or silicon nitride. Other exemplary materials include, but are notlimited to, cured hydrogen or methyl silsesquioxane compositions, thevarious PolyArylene Ether (PAE) polymers such as SiLK® manufactured byThe Dow Chemical Company of Midland, Mich., Velox™ manufactured bySchumacher of Carlsbad, Calif., or FLARE™ manufactured by Honeywell ofMorristown, N.J.

During the formation of HARCs, second gaseous etchants, not necessarilycontaining He, such as argon (Ar), xenon (Xe), and combinations thereof,can first be used to form openings having aspect ratios of less thanabout 15:1. As the aspect ratio approaches the 15:1 value, thecomposition of the second gaseous etchant can be exchanged to a firstgaseous etchant having at least fifty (50) percent He.

In an additional embodiment, a process is provided that etches aninsulating layer with a plasma of a heavy ion to produce an opening.Once the opening reaches an aspect ratio of about 15:1, the heavy ion isexchanged for a light ion to etch the opening to an aspect ratio of atleast 20:1.

In another embodiment, a process is provided that etches an insulatinglayer with a plasma of a gaseous etchant to produce a HARC. Further, theHARC has an elongate, symmetrical shape and an aspect ratio of about atleast 15:1 for a depth dimension of about 80 nm. Embodiments of thepresent disclosure can also be used to form HARCs having an aspect ratioof at least 20:1. In one embodiment, a contact is formed in a insulatinglayer where the opening allows an axis perpendicular to the insulatinglayer to pass through the opening to the bottom uninterrupted by theside of the opening. Further, the contact has an opening that defines anessentially elongate symmetrical shape with an aspect ratio of at least20:1 for a depth dimension of greater than eighty (80) nm. In anotherembodiment, the contact receives layers to form a capacitor to be usedin a memory device, such as random access memory (RAM), dynamic randomaccess memory (DRAM), or static random access memory (SRAM).

As used herein, the term “semiconductor substrate” or “semiconductivesubstrate” is defined to mean any construction comprising semiconductivematerial, including, but not limited to bulk semiconductive materialssuch as a semiconductive wafer (either alone or in assemblies comprisingother materials thereon), and semiconductive material layers (eitheralone or in assemblies comprising other materials). As used herein, theterm “substrate” refers to any supporting structure, including, but notlimited to, the semiconductive substrates described herein. As usedherein, the term “layer” encompasses both the singular and the pluralunless otherwise indicated. As used herein, the term “twisting” or“twisting phenomenon” refers to when the etch front of the openingdeviates from what is perpendicular to the semiconductor substratesurface.

It is to be understood that the first gaseous etchant and second gaseousetchant act as inert gases in conjunction with a reactive gas to etchthe dielectric. Therefore, as a reactive gas is added, the flow rate(square cubic centimeters per minute (sccm)) of the first and secondgaseous etchants would be adjusted while keeping their relative amountsthe same. The reactive gas may be any gaseous material known foretching. Examples of suitable reactive gases for use with the presentdisclosure include: hydrogen bromine (HBr), chloride (Cl₂) carbontetrafluoride (CF₄), trifluoromethane (CHF₃), and the like. It should beunderstood that the selection of the reactive gas will be determined bythe substrate to the etched as well as the physical parameters of theetching process such as power, pressure, temperature, and the like.

It is to be understood that all percentage values of etchant materialsare flow rate percentages. For example, a first gaseous etchant havingat least fifty (50) percent helium (He) would mean that of the gasesflowing into a plasma reactor, fifty (50) percent of the square cubiccentimeters per minute (sccm) is He.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a cross section of a structure illustrating thetwisting phenomenon.

FIGS. 2 and 3 are pictures showing the twisting phenomenon.

FIG. 4 is a graph providing twisting data for openings formed with agaseous etchant of He versus Ar.

FIG. 5 illustrates an embodiment cross section of a resulting structureafter performance of one etch method embodiment according to the presentdisclosure.

FIG. 6 is a picture showing one resulting structure embodiment afterperformance of an etch method according to the present disclosure.

FIG. 7 illustrates a general diagram of a plasma generation devicesuitable for use with embodiments of the present disclosure.

FIG. 8 illustrates a system having a memory device in which an openingaccording to various embodiments of the present disclosure can be used.

DETAILED DESCRIPTION

The Figures herein follow a numbering convention in which the firstdigit or digits correspond to the drawing Figure number and theremaining digits identify an element or component in the drawing.Similar elements or components between different Figures may beidentified by the use of similar digits. For example, 110 may referenceelement “10” in FIG. 1, and a similar element may be referenced as 210in FIG. 2. It should also be apparent that the scaling on the figuresdoes not represent precise dimensions of the various elementsillustrated therein.

Producing high aspect ratio contacts (HARCs) with aspect ratios ofgreater than 15:1 has proven difficult due to twisting phenomenon. FIG.1 provides an illustration of twisting phenomenon. As illustrated,electrons 101 will mainly strike the insulating layer 114 defining theopening 104 near the top 103 of the opening; while positive ions 102will reach the bottom 105 of the opening. This is what causes the top103 of the opening to charge negative while the bottom 105 of theopening 104 charges positive. The charge at the bottom 105 of theopening will result in off-axis ions being repelled to the side 106 ofthe opening 104.

In addition, small asymmetries in the top 103 of the opening 104, due tophotolithography or polymer loading, can also cause asymmetric chargingat the top 103 of the opening 104 leading to bending of the incidentions 102. This may then cause the opening 104 to etch faster on one side106 due to increased ion 102 flux to one area. Other illustrations ofopenings exhibiting the twisting phenomenon (circled) are shown in FIGS.2 and 3.

Often in contact hole or via etching the process starts out etchingnormally (e.g., no twisting), but at a certain aspect ratio the etchingaction begins to twist. In some instances this transition occurs at anaspect ratio of approximately 15:1 for a depth dimension of about eighty(80) nm. Twisting is particularly problematic in etching processes thatuse heavy ions (e.g., argon (Ar) and xenon (Xe)), where the etchingplasma has a large energy disparity between the ion and electron. Thelarge energy disparity results in the heavy ions reaching the openingwith a more vertical velocity than the corresponding electron from theplasma. As a result, as the aspect ratio increases above 15:1 for adepth dimension of about 80 nm, ions begin to accumulate at the bottomof the opening. As additional ions continue to be introduced into theopening they are focused and defocused by the electric fields, causingprofile distortion and a reduction in etch rate. The reduction in etchrate is termed “aspect ratio dependent etch rate” due to changing etchrates as the aspect ratio of openings increases and is a result ofcharge buildup at the bottom of an opening. Also, if there are anyasymmetries in the charge build due to pattern, polymer, or featureasymmetry, the twisting phenomena will result as the ions are focused toone side of the feature. Embodiments are not limited to the about eighty(80) nm depth dimension given in this example. Other depth dimensionsare also possible, including those greater than eighty (80) nm and thoseless than eighty (80) nm.

Although the use of heavy ions produces twisted openings and reducedetch rate, plasma etching using heavy ions continues to predominate incurrent plasma etch processes due to its mask selectivity. Heavy ionsdisplay a mask selectivity that allows the plasma to more selectivelyetch the exposed insulating layer instead of the masking layer. So,despite the existence of the twisting and etch rate problem in highaspect ratio opening etches, mask selectivity continues to be one mainreason for the use of the heavy ions in plasma etching.

Embodiments of the present disclosure help to reduce the twistingphenomenon and the etch rate reduction in openings formed in insulatinglayers. Despite the conventional preference for etching high aspectratio opening in insulating layers with heavy ions, the embodiments ofthe present disclosure have surprisingly discovered that the use ofplasma from light, low energy ions is highly effective in reducing oreliminating twisting in forming HARCs through insulating layers.

While not wishing to be bound by theory, it is believed that the use oflight, low energy ions of the present disclosure to etch openings havingan aspect ratio of at least 15:1 at about an eighty (80) nm depthdimension results in a reduction of the energy disparity between the ionand the electron of the plasma. Because of the low energy disparity theions are able to neutralize the negative charge at the top of theopenings. This facilitates the entry of more electrons into theopenings. Positive charges from the ions at the bottom of the openingsare then neutralized by the electrons entering the openings. Asadditional ions are introduced into the opening, they continue to etchwithout being repelled into the side of the opening. As a result,twisting of the opening is reduced for openings having an aspect ratioof at least 15:1 or greater with at least an eighty (80) nm depthdimension. Also, as the aspect ratio increases, it is not accompanied bythe usual charge buildup which affects the etch rate. Therefore, the useof light, low energy ions also eliminates the aspect ratio dependentetch rate enabling the etch rate to remain approximately constantthroughout the etch.

As used herein, light, low energy ions for use as a plasma etchantinclude those from helium (He). In various embodiments, a first gaseousetchant having at least fifty (50) percent He is used to etch ainsulating layer. The result has been a reduction in the twistingphenomenon seen in etching openings in insulating layers. FIG. 4provides a comparison of the twisting phenomenon observed in openingsetched when the first gaseous etchant has at least fifty (50) percent Heversus the first gaseous etchant being predominantly Ar. The twisting inFIG. 4 was measured by analyzing the deviation of the etched openingfrom an imaginary center line extending through the center of the top ofthe opening. As shown, the processes using He show a smaller range oftwisting and do not show twisting greater than about forty (40)nanometers (nm) from the center line as compared to the twistingobserved for the processes using predominantly Ar.

In the various embodiments, openings having an aspect ratio of at least15:1 can be etched with the plasma of a first gaseous etchant containingat least fifty (50) percent He. As will be discussed herein, other gasescan be used with He to form the plasma of the first gaseous etchant.

Although the use of a first gaseous etchant containing at least fifty(50) percent He produces significantly less twisting than processeswithout He, current practices have tended away from using He due to itspoor mask selectivity. For example, using He in the first gaseousetchant can lead to both the mask layer and the insulating layer beingetched.

To minimize the mask selectivity issue, embodiments of the presentdisclosure provide a significant portion of He to the first gaseousetchant once the phenomenon of twisting begins to be observed inopenings in insulating layers. In the embodiments of the presentdisclosure, twisting typically begins to be observed at openings ininsulating layers having an aspect ratio of at least 15:1. By adding Heto the first gaseous etchant once the opening has reached an aspectratio of at least 15:1, the opening can be etched to an aspect ratio ofat least 20:1 or greater with less twisting than when He is not present.Also, since He is used for just a portion of the plasma etch, theeffects of helium's poor mask selectivity is decreased.

One such embodiment first etches an opening in an insulating layer usinga second gaseous etchant containing Ar, Xe, or combinations thereofuntil the opening has an aspect ratio of less than about 15:1. As willbe appreciated, the second gaseous etchant can also include He. Then,once the opening has reached the aspect ratio of less than about 15:1,the second gaseous etchant containing Ar, Xe, or combinations thereof isexchanged for a first gaseous etchant containing at least fifty (50)percent He. The etching process can then continue further to produce anopening having an aspect ratio of at least 20:1.

Embodiments of the present disclosure further include the use of othergases with He to form the first gaseous etchant of the presentdisclosure. Examples of such other gases can be selected from gases suchas Ar, Xe, krypton (Kr), bromine (Br), large fluorocarbon ions, andcombinations thereof. For example, in one embodiment the opening havingan aspect ratio of at least 15:1 can be etched with a first gaseousetchant containing about ninety (90) percent He and about ten (10)percent Ar. Selection of these additional gases can be based in part onthe insulating layer to be etched. In addition, the additional gasesused in conjunction with He can be used to lower the activation energyrequired to produce the plasma. As will be appreciated, it is alsopossible to use He as the gas for the first gaseous etchant. In otherwords, it is possible to use He as the gas for the first gaseous etchantwithout the addition of any additional gases.

An additional embodiment exposes the insulating layer to a plasma of aheavy ion gaseous etchant to etch an opening to an aspect ratio of lessthan about 15:1. Once the aspect ratio of the opening is about 15:1, theheavy ion gaseous etchant is exchanged for a light ion gaseous etchantto further etch the opening to an aspect ratio of at least 20:1. As willbe appreciated, the heavy ion gaseous etchant includes a first inert gasand a first reactive gas and the light ion gaseous etchant includes asecond inert gas and a second reactive gas. In one embodiment, the firstand second inert gases are made up of heavy and light ions,respectively. Examples of heavy ions in the first inert gas include, butare not limited to Ar, Xe, Kr, Br, large fluorocarbon ions, andcombinations thereof. Examples of light ions in the second inert gasinclude, but are not limited to, He, neon (Ne), chlorine (Cl), andfluorine (F) ions. In an additional embodiment, the first and secondreactive gases are made up of heavy and light ions, respectively. Anexample of a heavy ion in the first reactive gas is Br. An example of alight ion in the second reactive gas is Cl.

A further embodiment of the present disclosure uses only a reactive gasto etch the openings. The embodiment exposes the insulating layer to aplasma of a heavy ion reactive gas etchant to etch an opening to anaspect ratio of less than about 15:1. Once the aspect ratio of theopening is about 15:1, the heavy ion reactive gas etchant is exchangedfor a light ion gas etchant to further etch the opening to an aspectratio of at least 20:1. As will be appreciated, the entire etchchemistry is exchanged once the aspect ratio reaches about 15:1 due tothe absence of an inert gas.

FIG. 5 illustrates an opening 504 in an insulating layer 514 producedaccording to the present disclosure. As shown, the opening 504 does notexhibit twisting. In particular, an axis 530 perpendicular to theinsulating layer 514 can pass through the opening 504 uninterrupted bythe side 506 of the opening 504. Also, the opening 504 defines anessentially elongate, symmetrical shape with an aspect ratio of about atleast about 15:1. The opening 504 can also be formed in a insulatinglayer according to the processes described herein having an aspect ratioof at least 20:1.

In one embodiment, the opening 504 can be a contact, a via, or a trench.In another embodiment, the opening 504 is a contact with an aspect ratioof at least 20:1, produced according to the process described herein. Inanother embodiment, the depth of the contact is at least eighty (80) nmor greater. In still another embodiment, the opening receives layers toform a capacitor for use in a memory device. The memory device includesa transistor, a conductive line, and the capacitor contained in theinsulating layer having an opening as described in the presentdisclosure with an aspect ratio of at least 20:1. The transistor and thecapacitor are connected by the conductive line. The capacitor can alsobe fabricated as part of RAM, DRAM, or SRAM circuitry.

Additionally, FIG. 5 shows a substrate assembly 510 to be etched using aplasma from a first gaseous etchant 520 generated in accordance with theembodiments described herein. Substrate assembly 510 comprises anexemplary bulk substrate material 512, for example monocrystallinesilicon. Of course, other materials and substrates are contemplated,including semiconductor-on-insulator and other substrates whetherexisting or yet-to-be developed.

A insulating layer 514 can be formed over substrate 512. An exemplaryinsulating layer is an oxide, such as TEOS, but can also be silicateglass, silicon oxide, silane, polytetraflouroethylene (PTFE), or siliconnitride. Other exemplary materials include, but are not limited to,cured hydrogen or methyl silsesquioxane compositions, the variousPolyArylene Ether (PAE) polymers such as SiLK® manufactured by The DowChemical Company of Midland, Mich., Velox™ manufactured by Schumacher ofCarlsbad, Calif., or FLARE™ manufactured by Honeywell of Morristown,N.J. A masking layer 516 is deposited over insulating layer 514. Anexemplary mask material is a semi-hard amorphous carbon mask. Of course,multilayer or other masking layer processes are also contemplated, suchas multilayer mask processing. It should be apparent to one skilled inthe art that the structure may be used in the formation of variousdevices or circuits, such as SRAMS, DRAMs, etc.

The embodiments presented herein can also be beneficial for defininghigh aspect ratio openings through an insulating layer to any underlyingmaterial. As such, substrate 512 includes a surface region 507 to whichthe high aspect ratio opening 504 extends. Thus, the opening 504provides for forming an interconnect, an electrode, etc., relative tothe surface region 507 of substrate 512. For example, the surface region507 may be any silicon containing region, e.g., a silicon nitride regionor a doped silicon or doped polysilicon region. However, the presentinvention is in no mariner limited to such silicon containing regionsbut is limited only in accordance with the accompanying claims. Suchhigh aspect ratio features may be formed relative to any surface region507 (e.g., silicon nitride, a metal interconnect, a metal silicide,dielectric material) of a substrate 512 for forming any number offeatures, such as a contact hole for an interconnect level, a gateelectrode, a capacitor electrode, a via, etc. It should be recognizedthat the surface region 507 may be the same or different from thematerial of the remainder of substrate 512. For example, the surfaceregion 507 may be of a continuous nature with the remainder of thesubstrate 512.

The etch of the insulating layer 514 is an anisotropic etch performedusing a plasma from a first gaseous etchant 520 generated in accordancewith the embodiments herein. The plasma may be generated utilizing anyknown suitable etching device, such as an etcher available from AppliedMaterial under the trade designation of P5000 etcher, an etchingapparatus as described in U.S. Pat. No. 4,298,443; a 9100 TCP OxideEtcher available from Lam Research Corporation, or any other highdensity plasma etcher. It should be readily apparent to one skilled inthe art that depending on the particular etching apparatus utilized togenerate the plasma, various parameters may vary for accomplishingsimilar objectives.

By way of example, FIG. 6 provides a picture of an opening with noappreciable twisting in a insulating layer formed according to thepresent disclosure.

FIG. 7 generally shows an illustrative etch reactor 750 for performingetching. It should be recognized that this is an illustrative diagramrepresentative of an entire system even though only several componentsof the system are shown. Various systems incorporating many elements invarious configurations may be utilized. To generate plasma 720, a gasaccording to the present disclosure is provided to the illustrativeplasma generator 750. In one embodiment, the gas is provided to theplasma generation apparatus 750 containing at least fifty (50) percentHe.

The illustrative etch reactor 750 includes a powered electrode 760connected to an RF bias source 765 via capacitance 767 upon which asemiconductor substrate having a insulating layer to be etched isplaced. Further, an RF source 766 is connected to elements, e.g., coils,for generating the plasma 720 in chamber 770. Ion sheath 756 is formedbetween the plasma 720 and the powered electrode 760. With thesemiconductor substrate 764 positioned within the illustrative plasmageneration apparatus 750, the insulating layer is etched in accordancewith the embodiments resulting in the structure of FIG. 5. The powersource 766 utilized may be any suitable power source including an RFgenerator, a microwave generator, etc. It will be readily apparent thatany plasma etching system may be used.

Embodiments of the present disclosure can also include a processor basedsystem that incorporates the opening formed in the insulating layeraccording to the process embodiments described herein. For example, FIG.8 provides an embodiment of a processor based system 834 that includes acapacitor contained in a insulating layer having an opening formedaccording to the present disclosure for use in a memory device 880. Asshown in FIG. 8, the system 834 may also include one or more inputdevices 844, e.g., a keyboard, touch screen, transceiver, mouse, etc.,connected to the computing unit 835 to allow a user to input data,instructions, etc., to operate the computing unit 835. One or moreoutput devices 846 connected to the computing unit 835 may also beprovided as part of the system 834 to display or otherwise output datagenerated by the processor 836. Examples of output devices includeprinters, video terminals, monitors, display units, etc.

Although specific embodiments have been illustrated and describedherein, those of ordinary skill in the art will appreciate that anarrangement calculated to achieve the same results can be substitutedfor the specific embodiments shown. This disclosure is intended to coveradaptations or variations of various embodiments of the presentdisclosure. It is to be understood that the above description has beenmade in an illustrative fashion, and not a restrictive one. Combinationof the above embodiments, and other embodiments not specificallydescribed herein will be apparent to those of skill in the art uponreviewing the above description. The scope of the various embodiments ofthe present disclosure includes other applications in which the abovestructures and methods are used. Therefore, the scope of variousembodiments of the present disclosure should be determined withreference to the appended claims, along with the full range ofequivalents to which such claims are entitled.

In the foregoing Detailed Description, various features are groupedtogether in a single embodiment for the purpose of streamlining thedisclosure. This method of disclosure is not to be interpreted asreflecting an intention that the disclosed embodiments of the presentdisclosure have to use more features than are expressly recited in eachclaim. Rather, as the following claims reflect, inventive subject matterlies in less than all features of a single disclosed embodiment. Thus,the following claims are hereby incorporated into the DetailedDescription, with each claim standing on its own as a separateembodiment.

1. A capacitor comprising: a first conducting material for a bottomelectrode formed in an opening having a bottom and a side in ainsulating material that allows an axis perpendicular to the insulatingmaterial to pass through the opening to the bottom uninterrupted by theside of the opening, where the opening defines an essentially elongatesymmetrical shape having an aspect ratio of at least 20:1; a dielectricmaterial formed over the first conducting material; and a secondconducting material for a top electrode formed over the dielectricmaterial.
 2. The capacitor of claim 1, wherein the opening is formed byexchanging a first ion gaseous etchant for a second ion gaseous etchant,the second ion gaseous etchant including a second inert gas and a secondreactive gas, once the aspect ratio of the opening is etched toapproximately 15:1, the second ion gaseous etchant being used to furtheretch the opening to the aspect ratio of at least 20:1, the first iongaseous etchant includes a first inert gas and the first reactive gas.3. The capacitor of claim 2, wherein the second ion gaseous etchant hasa lower mean molecular weight of the mixture of the second inert gas andthe second reactive gas than the mean molecular weight of the meanmolecular weight of the mixture of the first inert gas and the firstreactive gas.
 4. The capacitor of claim 3, wherein the opening is formedby exposing the insulating material in a plasma etch reactor to a plasmaof the first ion gaseous etchant including the first inert gas and afirst reactive gas, to etch the opening to an aspect ratio ofapproximately 15:1.
 5. The capacitor of claim 1, wherein the opening isformed by: first exposing the insulating material to a plasma of asecond gaseous etchant comprising Ar, Xe, and combinations thereof toetch an opening to a first aspect ratio of less than 15:1; exposing theinsulating material to a plasma of a first gaseous etchant having atleast fifty percent helium (He) to etch the opening from the firstaspect ratio to a second aspect ratio of at least 15:1 with the plasmaof the first gaseous etchant; and exposing the insulating material to aplasma of a reactive gaseous etchant in conjunction with each of thefirst and second gaseous etchants, wherein the first gaseous etchant hasa lower molecular weight than the second gaseous etchant.
 6. Thecapacitor of claim 5, wherein the second gaseous etchant includes He. 7.The capacitor of claim 6, formed in accordance with the process foretching the insulating material further comprising exchanging the secondgaseous etchant for the first gaseous etchant once the aspect ratio ofthe etched openings reaches approximately 15:1.
 8. The capacitor ofclaim 5, where the first gaseous etchant is a mixture of He and Ar. 9.The capacitor of claim 5, where the first gaseous etchant isapproximately ninety percent He and approximately ten percent Ar. 10.The capacitor of claim 5, where the first gaseous etchant isapproximately one hundred percent He.
 11. The capacitor of claim 5,wherein the contact has an aspect ratio of at least 20:1.
 12. Thecapacitor of claim 1, wherein the opening is formed by: first exposingthe insulating material to a second plasma of a second gaseous etchantcomprising Ar, Xe, and combinations thereof to form an opening having anaspect ratio of less than 15:1; and second exposing the insulatingmaterial to a first plasma of a first gaseous etchant having at leastfifty percent helium (He) to etch the opening having an aspect ratio ofat least 15:1, thereby increasing the aspect ratio to greater than 15:1,wherein the first gaseous etchant has a lower molecular weight than thesecond gaseous etchant.
 13. A memory device comprising: a transistor; aconductive line; and a capacitor connected by the conductive line to thetransistor, wherein the capacitor is contained in a insulating materialhaving an opening with a bottom and a side in the insulating materialthat allows an axis perpendicular to the insulating material to passthrough the opening to the bottom uninterrupted by the side of theopening and having an aspect ratio of at least 20:1.
 14. The memorydevice of claim 13, wherein the opening is formed by: first exposing theinsulating material to a second plasma of a second gaseous etchantcomprising Ar, Xe, and combinations thereof to form the opening to anaspect ratio of approximately 15:1; and second exposing the insulatingmaterial to a first plasma of a first gaseous etchant having at leastfifty percent helium (He) to etch the opening to an aspect ratio of atleast 15:1, wherein the first gaseous etchant has a lower molecularweight than the second gaseous etchant.
 15. The memory device of claim13, wherein the opening is formed by: exposing the insulating materialin a plasma etch reactor to a plasma of a heavy ion gaseous etchant toetch the opening to an aspect ratio of less than approximately 15:1; andexchanging the heavy ion gaseous etchant for a light ion gaseous etchantincluding a second inert gas and a second reactive gas, once the aspectratio of the etched opening reaches approximately 15:1 to further etchthe opening to the aspect ratio of at least 20:1, wherein the light iongaseous etchant has a lower mean molecular weight of the mixture of thesecond inert gas and the second reactive gas than the mean molecularweight of the first inert gas and the first reactive gas in the heavyion gaseous etchant.
 16. The memory device of claim 13, wherein theopening is formed by: first exposing the insulating material to a secondplasma of a second gaseous etchant to form the opening to an aspectratio of approximately 15:1; and second exposing the insulating materialto a first plasma of a first gaseous etchant to etch the opening to anaspect ratio of greater than 15:1, wherein the first gaseous etchant hasa lower molecular weight than the second gaseous etchant.
 17. The memorydevice of claim 13, wherein the first plasma of a first gaseous etchanthas at least fifty percent helium (He).
 18. The memory device of claim14, wherein the memory device is a memory cell of a memory selected froma group comprising a dynamic random access memory (DRAM) and a staticrandom access memory (SRAM).
 19. A system, comprising: a data inputdevice; a data output device; a processor coupled to the data input anddata output devices; and a random access memory (RAM) device coupled tothe processor, where the memory device includes: a transistor; aconductive line connected to the transistor; and a capacitor connectedto the conductive line, wherein the capacitor is contained in ainsulating material having an opening with a bottom and a side in theinsulating material that allows an axis perpendicular to the insulatingmaterial to pass through the opening to the bottom uninterrupted by theside of the opening having an aspect ratio of at least 20:1.
 20. Thememory device of claim 19, wherein the opening is formed by: firstexposing the insulating material to a plasma of a first gaseous etchantto form the opening to an aspect ratio of less than 15:1; and secondexposing the insulating material to a plasma of a second gaseous etchanthaving a lower molecular weight than the first gaseous etchant andincluding at least fifty percent helium (He) to increase the aspectratio to greater than 15:1.